Another giant, powering advanced packaging.

Long-term development of Samsung in the wafer OEM field can be said to have encountered repeated setbacks. In the competition of advanced process technology, although Samsung took the lead in adopting GAA all-around gate technology in the 3nm process, trying to overtake TSMC, it fell into a passive position due to initial yield issues. Market research institutions estimate that the cost of Samsung manufacturing 3nm chips is about 40% higher than TSMC's, leading to the loss of orders from high-end customers. Industry giants such as Apple and NVIDIA continue to move closer to TSMC. According to TrendForce data, in the first quarter of 2025, TSMC's global OEM market share reached 67.6%, while Samsung's share dropped from 8.1% in the previous quarter to 7.7%. In terms of process advancement, Samsung planned to start mass production of the 1.4nm process in 2027, but announced in June 2025 that it would be postponed to 2029, and the construction of the test line was also put on hold. At the same time, the cutting-edge process wafer fab in Taylor, Texas faced delays in opening until 2026 due to a lack of customers, further highlighting the difficulties of Samsung's expansion in the advanced process market. However, under the pressure of advancing advanced process technologies, Samsung has quietly shifted its focus to another key battlefield. In recent years, advanced packaging has become a strategic high ground in the semiconductor industry. Facing structural challenges in wafer OEM, this tech giant has chosen to use advanced packaging technology as a breakthrough path, with a series of new initiatives unfolding, opening up new possibilities for its competitiveness in the semiconductor market. With a $7 billion investment in a factory, Samsung is making a foray into the blank space in the advanced packaging market in the US after signing a $16.5 billion chip OEM deal with Tesla. This news has instantly ignited industry attention and become a hot topic in the global semiconductor field. Samsung's wafer OEM business has long been stuck in a quagmire. However, the huge order from Tesla, like rain after a drought, greatly boosted Samsung's market value and market confidence, injecting strong support into its subsequent investment plans and reaffirming Samsung's determination to further cultivate and expand its layout in the US market. With a planned advanced packaging factory in the US, Samsung will focus on addressing the weaknesses in the American semiconductor industry's current thin areas. Currently, the US has strong capabilities in chip design and wafer manufacturing, with design giants like NVIDIA and Qualcomm, and foundries like TSMC and Intel have fabs in the country. However, high-end packaging technology lags far behind, with no high-end packaging facilities in the US. 90% of the world's advanced packaging capacity is concentrated in Asia, with a lack of key technology facilities such as 2.5D/3D stacking and Chiplet integration in the US. This industry gap has become a key target for Samsung's strategic entry. This $7 billion packaging factory will become a key part of Samsung's "design-manufacturing-packaging" integrated model. According to the plan, the factory will focus on high-end packaging technology, synergize with the Taylor, Texas wafer fab, and provide end-to-end services from chip design to product delivery to customers. This strategic positioning precisely targets the time difference with TSMCTSMC's advanced packaging factory in the US will not be operational until 2029 at the earliest. If Samsung can land first, it can seize precious market first-mover advantage, securing an edge in the time window. It is important to note that Samsung's investment pace is linked to order acquisition. Just ten days after securing the Tesla order, it also won an order for Apple's image sensors, showing the urgent need for localized capacity by customers. To avoid US tariff barriers, localization of the entire chip manufacturing process, from chip manufacturing to packaging testing, has become an inevitable choice, further highlighting the urgency of building a local packaging factory. On the technical front, with the evolution of semiconductor technology, advanced packaging has become a key path to enhancing chip performance and achieving heterogeneous integration. Samsung's expansion plans in the area of advanced packaging aim to challenge TSMC's dominance in AI chip packaging with its CoWoS technology. Also, in creating a Chiplet ecosystem, Samsung is aiming to build the next generation Chiplet ecosystem, uniting US chip design companies to gain an advantageous position in future chip technology competitions. Taking into account the supply chain layout perspective, establishing packaging capacity in the US fits into the trend towards localization and security of global supply chains. Leveraging the Taylor, Texas wafer fab, Samsung can provide customers with end-to-end services from chip design, manufacturing, to packaging, significantly reducing delivery times and improving response speed to customer needs. Especially in the current explosion of demand for AI chips, the addition of US local packaging capacity will provide NVIDIA, AMD, and other high-performance computing chip companies with a more convenient and efficient supply chain choice, enhancing Samsung's overall competitiveness in the high-end chip market. Policy dividends cannot be ignored either. The US's "CHIPS Act" provides $52 billion in subsidies, with $2.5 billion specifically allocated to advanced packaging. Samsung's investment plan aligns closely with policy directives and is expected to receive substantial subsidy support, effectively reducing initial investment risks. However, Samsung's layout is not without its challenges. Setting up a factory in the US faces the challenge of high labor and energy costs, which are 30-40% higher than in South Korea, balancing these costs will be a challenge. Additionally, there is a shortage of semiconductor professionals in the US, especially in advanced packaging technologies, and Samsung will need to address recruitment and training issues to ensure smooth factory operations. In conclusion, Samsung's $7 billion investment in a US packaging factory is a strategic positioning to capture market opportunities in the advanced packaging field. With a focus on filling the market gap, strengthening capabilities, and enhancing competitiveness, Samsung is strategically transforming its semiconductor business. By tapping into the US market potential, aligning with industry trends, and leveraging policy support, Samsung aims to reshape the competitive landscape in the global semiconductor industry. --- Samsung set up the Advanced Chip Packaging Development Center in Yokohama, Japan In the global competition of advanced semiconductor packaging technology, Samsung Electronics has scored another significant achievement. According to industry sources, Samsung plans to invest 25 billion yen (approximately $1.7 billion) in establishing an advanced chip packaging research center in Yokohama, Japan. This move aims to strengthen its technological capabilities in this field and further challenge TSMC's leading position. The research center will be located in the Leaf Minato Mirai building in the Yokohama Port Future District. This 12-story building, with a total floor area of 47,710 square meters (including 4 underground levels), will be renovated into a research base integrating research laboratories and pilot production lines, expected to be officially operational by March 2027. It is noteworthy that this is Samsung's first major acquisition of a large building in Japan in nearly a decade. Previously, in 2015, it sold a stake in its Roppongi headquarters building in Tokyo. This strategic move highlights Samsung's strong focus on advanced packaging technologies. In terms of collaboration ecosystem, Samsung's Yokohama research center will focus on deepening collaboration with the Japanese semiconductor industry. Plans are in place to establish technological partnerships with companies such as Disco Corp, Namics Corp, and Rasonac Corp, Japanese material and equipment suppliers, and strengthen industry-academia research collaboration with the University of Tokyothe school is less than an hour's drive from the research center, and Samsung plans to recruit a large number of master's and doctoral researchers to enrich the research team. The Yokohama city will also provide 2.5 billion yen in start-up subsidies to support the establishment of the research center. Samsung's move also aims to address the shortcomings in the packaging field and seize market opportunities in the field of packaging. As a key technology for enhancing chip performance, advanced packaging is crucial in AI chip manufacturing, allowing for chip function enhancement without the reliance on ultra-fine nano-processes. However, Samsung still lags behind TSMC in this area: Counterpoint data shows that in the first quarter of 2025, TSMC's total market share in the manufacturing, packaging, and testing market reached 35.3%, while Samsung only held 5.9%, especially in high-end packaging capacity and technology, the gap is significant. However, the market growth potential and the breakthroughs Samsung has achieved provide the company with the motivation. The advanced chip packaging market is expected to grow from $34.5 billion in 2023 to $80 billion by 2032, and Samsung's recent success in securing a $16.5 billion AI6 chip order with Tesla is seen as evidence of its improved turnkey service capability (OEM + packaging integration). The establishment of the Yokohama research center is a key move for Samsung to enhance its end-to-end "design-manufacturing-packaging" comprehensive service capability and catch up with TSMC. With Samsung's increased focus on advanced packaging research in Yokohama, the global semiconductor packaging market competition is set to intensify. This is not just a technological competition; it also involves a battle of industry ecosystem, and the Yokohama research center may become a key support point for Samsung to narrow the gap with TSMC. Samsung ups the ante with SoP technology, challenging TSMC's SoW packaging dominance In the next generation of advanced packaging technology competition, Samsung Electronics is fully promoting its "SoP (System on Panel)" technology for commercial implementation, directly competing with TSMC's "SoW (System on Wafer)" technology and Intel's "EMIB" process, aiming to seize the high ground in the production of high-performance AI chips for data centers. The core innovation of Samsung's SoP technology lies in using a 415mm510mm large rectangular panel as the packaging carrier, far exceeding the effective utilization area of traditional 12-inch wafers (diameter of 300mm). Traditional wafer-level packaging is limited by the round shape of the wafers, with the maximum rectangular module size that can be integrated being around 210mm210mm. Samsung's SoP panel can easily accommodate two such modules and even produce oversized semiconductor modules of more than 240mm240mm, providing a larger integration space for ultra-large-scale AI chip systems. In terms of architectural design, SoP eliminates the need for printed circuit boards (PCBs) and silicon interposer layers required by traditional packaging, and achieves direct chip-to-chip communication through refined copper redistribution layers (RDL). This design not only enhances integration density but also reduces packaging costs, particularly suitable for AI chip manufacturing and data center high-performance computing scenarios. Samsung's expertise in FOPLP technology in the panel-level packaging field provides a solid foundation for the development of SoP. In terms of commercial development, Samsung views Tesla's third-generation data center AI chip system as a significant target. The system plans to integrate multiple AI6 chips and initially adopt Intel's EMIB technology for production. If Samsung can address the challenges faced by SoP technology, such as edge warpage, production stability, and high-density RDL process development, it could potentially enter Tesla's supply chain for packaging. In addition, Samsung's simultaneous development of the "3.3D" advanced packaging technology is expected to further enhance its packaging efficiency and cost competitiveness. Furthermore, as a major competitor of Samsung, TSMC's SoW technology has already entered practical applications. This technology is based on a 12-inch wafer carrier and extended through the InFO technology, divided into SoW-P (integrated with SoC components only) and SoW-X (integrating SoC+HBM+I/O bare chips) platforms. SoW-P has already entered production, targeting mobile and edge devices, while SoW-X is planned for production in 2027, capable of integrating 16 high-performance computing chips and 80 HBM4 modules, designed for AI/HPC scenarios, providing up to 260TB/s of die-to-die bandwidth. TSMC's SoW technology leverages a mature wafer manufacturing system, offering advantages in yield control and production stability. It has already been used for large-scale production of supercomputing chips by companies such as Tesla and Cerebras. Its latest release, SoW-X technology, can support a 17,000W power budget through the redesign of wafer design and advanced liquid cooling strategy, achieving a 46% performance improvement and a 17% power reduction compared to traditional computing clusters. Samsung is betting on SoP technology, essentially challenging TSMC's dominant position in advanced packaging technology through a differentiated path. For Samsung, successful commercialization of SoP technology not only enhances its "design-manufacturing-packaging" integrated service capability but also consolidates its cooperation with major clients such as TeslaSamsung has already won a $16.5 billion AI6 chip OEM order from Tesla. If SoP technology matures, it may bring the packaging stage into the scope of collaboration as well. Though SoP currently faces technical challenges such as large-scale operational stability and the niche market of oversized packaging, Samsung is working on improving yield rates continuously, trying to gain market advantage before TSMC's full-scale production of SoW-X, reshaping the competitive landscape in the advanced packaging field. Samsung's foray into Glass Substrate Packaging, with technology slated for 2028 In the race for advanced packaging technology, Samsung Electronics is looking towards glass substrates, an emerging area in this field. Recent reports show that Samsung has explicitly planned to introduce glass substrates into the field of advanced semiconductor packaging by 2028, with the core goal of using glass interposers to replace traditional silicon interposers. This is the first time Samsung's roadmap for glass substrate technology has been officially revealed. As a key component of AI chip 2.5D packaging structures, the interposer performs critical functions connecting the GPU with HBM memory, directly affecting the chip's data transfer efficiency. Currently, mainstream silicon interposers, while offering high-speed transmission and high thermal conductivity advantages, are costly to produce and have complex manufacturing processes, serving as bottlenecks in lowering costs and improving efficiency for AI chips. Glass interposers, on the other hand, due to their ability to realize ultra-fine circuits, not only enhance semiconductor performance but also significantly reduce production costs, making it a recognized alternative direction in the industry. Samsung's technological roadmap decision is strategic. To speed up prototype development progress, they are prioritizing the development of small glass units smaller than 100x100 millimeters, rather than directly using large-format 510x515 millimeter panels. Although small-size units may affect production efficiency, they can help Samsung quickly verify technology and enter the market faster. This move is in line with the plans of companies like AMD, who are also expected to adopt glass interposer technology on a large scale by 2028. Furthermore, Samsung is fully utilizing its advantages in cross-industry collaboration. Since March of this year, Samsung Electronics has collaborated with affiliated companies such as Samsung Motors and Samsung Display to jointly develop glass substrate technology: Samsung Motors contributes proprietary technologies for semiconductor and substrate integration while Samsung Display provides glass processing support, creating interdisciplinary technological synergy. The recent addition of technical talent further strengthens Samsung's research capabilities in this field. On the manufacturing front, Samsung plans to combine glass interposers provided by external partners with the existing panel-level packaging (PLP) production line at the TIAN AN campus for the packaging process. The PLP technology, which completes the packaging process on a square panel, has higher production efficiency compared to traditional wafer-level packaging (WLP) and is highly compatible with the square characteristics of glass substrates, providing an existing manufacturing foundation for glass interposer production. This move by Samsung directly addresses the high demand for packaging technology in the AI era. At last year's wafer OEM forum, Samsung proposed a one-stop AI solution strategy covering wafer OEM, HBM, and advanced packaging. With the addition of glass interposer technology, Samsung can improve its packaging stage's performance and cost advantages, synergize with its HBM memory, advanced foundry businesses, and enhance its comprehensive service capabilities for AI chip customers. It is worth noting that Samsung's glass substrate strategy differs from its industry peers. Instead of blindly pursuing large-format panel technology, Samsung is rapidly advancing technology verification through small units, cross-industry resource coordination, and reuse of existing production lines. This pragmatic approach not only reduces technical risks but also highlights Samsung's overall strategy of "multi-point breakthroughs and continuous iterations." With the 2028 landing point approaching, glass substrate technology may become another important leverage for Samsung to challenge the packaging technology dominance.